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#	Item
671	Producing Wrong Data Without Doing Anything Obviously Wrong! Todd Mytkowicz Amer Diwan Matthias Hauswirth Peter F. Sweeney Add to Reading List Source URL: www-plan.cs.colorado.edu Language: English - Date: 2009-01-18 20:52:24 Benchmark Standard Performance Evaluation Corporation Unix Observation GNU Compiler Collection CPU cache Perl Software Computing Computer programming
672	PRODUCT BRIEF Alpha[removed]Microprocessor Add to Reading List Source URL: www.mikerohard.de Language: English - Date: 2002-08-09 06:42:54 DEC Alpha CPU cache 64-bit Alpha 21164 UltraSPARC III Computer hardware Computer architecture Alpha 21264
673	• Super SP4RC™ A Fully Integrated Superscalar Processor Steve Krueger . Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 22:44:25 CPU cache Cache Central processing unit Computer memory SuperSPARC Superscalar MBus UltraSPARC Computer hardware Computing Computer architecture
674	CHAPTER SEVEN GETTING HOLD OF MEMORY Thus far, we have used kmalloc and kfr ee for the allocation and freeing of memory. The Linux kernel offers a richer set of memory allocation primitives, however. Add to Reading List Source URL: www.xml.com Language: English - Date: 2001-07-12 23:10:12 Virtual memory Central processing unit Cache C dynamic memory allocation Slab allocation CPU cache Page Memory leak Memory pool Computing Computer memory Memory management
675	CS 243 Assignment 7 CS 243 Assignment 7 Parallelization and Locality Optimizations Add to Reading List Source URL: suif.stanford.edu Language: English - Date: 2015-03-04 17:08:43 Computing Compiler optimizations CPU cache Central processing unit Cache algorithms Data Loop tiling Cache Computer hardware Computer memory
676	In-Cache Query Co-Processing on Coupled CPU-GPU Architectures Jiong He Shuhao Zhang Add to Reading List Source URL: www.vldb.org Language: English - Date: 2014-11-12 16:57:58 Graphics hardware Cache Video cards Nvidia OpenCL CPU cache Graphics processing unit CUDA Parallel computing Computer hardware GPGPU Computing
677	Semantic Cache Investment Konrad G. Beiske, Jan Bjørndalen, Jon Olav Hauglid [removed], [removed], [removed] NTNU Add to Reading List Source URL: www.nik.no Language: English - Date: 2009-10-20 07:09:20 Computing SQL Cache CPU cache Query optimizer Distributed hash table Peer-to-peer Query plan Database Database management systems Data management Data
678	M7: Next Generation SPARC Hotchips 26 – August 12, 2014 Stephen Phillips Senior Director, SPARC Architecture Oracle Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2014-08-02 15:16:00 SPARC T3 Nehalem Intel Core CPU cache Microprocessors Montecito UltraSPARC T1 Computer hardware Oracle Corporation SPARC T4
679	494 IEEE TRANSACTIONS ON COMPUTERS, VOL. 48, NO. 5, MAY 1999 Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2005-02-24 14:03:08 Central processing unit Computer architecture Cache CPU cache Virtual memory Memory hierarchy Page table Program optimization Parallel computing Computer hardware Computer memory Computing
680	Design and Evaluation of Storage Organizations for Read-Optimized Main Memory Databases Craig Chasseur Jignesh M. Patel Add to Reading List Source URL: www.vldb.org Language: English - Date: 2013-10-08 06:26:08 Database management systems Query optimizer Database index B+ tree Extensible Storage Engine Relational database Column-oriented DBMS CPU cache Search engine indexing Data management Data Information

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